dev-uart_speedup merged

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jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

dev-uart_speedup merged

Post by jynik » Sat Jan 04, 2014 6:48 pm

Hi all,

The updates(from the dev-uart_speeup branch) mentioned in the recent blog post have been merged into master:
  • Faster UART bridge between FX3 and FPGA
  • IQ correction support
  • FPGA version number
  • Misc fixes
To use the lastest in master, please update to firmware 1.6.0 and FPGA v0.0.1.

Windows may want to wait for issue 183 to get resolved before attempting to flash new firmware.


Because of the change to the UART bridge speed, be sure to disable FPGA autoloading before flashing the firmware. Otherwise, the two devices won't be communicating at the same baudrate.

To disable FPGA autoloading, pass "X" to the bladeRF-cli autoload flash (-L) argument.

Code: Select all

$ bladeRF-cli -L X
If you ever happen to find yourself with incompatible versions or corrupted flash, remember that you can always recover by dropping to the FX3 bootloader and loading firmware to RAM using either bladeRF-flash or the Cypress Control Center program. From there, the CLI could be used to flash the desired versions.


While a number of folks have been kind enough to test drive this branch and have been reporting good results, let's remain on the lookout for any new defects or regressions. As always, please report or comment on defects on the GitHub issue tracker.

Cheers,
Jon




Update:
As noted on the wiki, an si5338 communication failure is likely to be the first symptom of a firmware & FPGA version mismatch.

Just a couple reminders, if you're seeing the "Could not write to si5338" error:
  • Ensure you've disabled FPGA autoloading before flashing new firmware.
    • If you don't do this, you'll wind up with firmware using one bridge baudrate, and an older FPGA getting autoloaded that uses the slower baud rate, and therefore, peripheral communication issues.
  • Ensure you've flashed FW v1.6.0. For good measure, power cycle the device after successfully flashing firmware.
  • The lastest FPGA now has a v0.0.1 version number -- double check that this is what you're attempting to load.

To expand a bit more on how to recover from forgetting to disable FPGA autoloading before flashing, here's a slightly more detailed summary of the "recovery" process.
  1. Use the jumper J64 to force the device into the bootloader. Be sure to remove the jumper once you've powered on the device and see that it's in the bootloader. This will be evident via a Cypress entry in dmesg output, Device Manager, etc. If you forget to remove the jumper, you won't be able to access flash in the following steps.
  2. Use bladerf-flash or the Cypress SDK tool ("Control Center" in Windows, "cyusb_linux" in Linux) to load the older firmware into RAM, such as v1.5.3.
  3. Once the device is running firmware from RAM, you can run

    Code: Select all

    bladeRF-cli -L X
    to disable autoloading.
  4. At the point you could also re-flash the firmware. (However, if you're following this procedure, you probably already have it flashed.)
Update 2:
This thread contains more details on the above recovery procedure: http://nuand.com/forums/viewtopic.php?f=4&t=3515

dk5ras
Posts: 70
Joined: Fri Mar 01, 2013 3:23 am

Re: dev-uart_speedup merged

Post by dk5ras » Mon Jan 06, 2014 3:04 am

Following your instructions works just fine. However it looks to me now like I and Q swapped, when using gqrx, and there is a strong symmetrical image. Swapping I and Q and playing with iqbal and remove DC does not bring it to the previou quality of the spectrum.

Edit: This is the same for SDR# and Windows, so I guess it is not some mix-up in my Linux installation.

Do the files from http://hoopycat.com/bladerf_builds/ include those new features, or should I stay with those from nuand.com?

Ralph.

drmpeg
Posts: 62
Joined: Fri Mar 01, 2013 3:58 am
Location: Silicon Valley
Contact:

Re: dev-uart_speedup merged

Post by drmpeg » Mon Jan 06, 2014 5:06 am

The poor receive spectrum is a known bug. It was mentioned in the blog post at http://www.nuand.com/blog/

"Mitigating any remaining buffering, and spectral inversion issues some of you may be experiencing."

However, the new FPGA does fix the transmitter, so it's very useful for TX projects.

Here's some gqrx pics that show the problem (using an over the air ATSC signal which should have the pilot on the left).

As sample rate is increased, the pilot moves from the left, to both sides, and then finally to the right. A very odd behavior indeed.

Image
Image
Image
Image
Image
Image

Ron

dk5ras
Posts: 70
Joined: Fri Mar 01, 2013 3:23 am

Re: dev-uart_speedup merged

Post by dk5ras » Mon Jan 06, 2014 7:30 am

Well, they write about mitigating...in fact these problems did not mitigate, but show up with this release :)

Ralph.

dk5ras
Posts: 70
Joined: Fri Mar 01, 2013 3:23 am

Re: dev-uart_speedup merged

Post by dk5ras » Mon Jan 06, 2014 8:42 am

This screenshot http://dk5ras.dyndns.org/tmp/bladerf_problem.png is how a LTE1800 signal shows up after this upgrade of firmware and FPGA image (115k). 1808 - 1822 MHz is the real signal, only in the right place when IQ swap is active, the smaller block on the right side is the image that was not there before.

Ralph.

bpadalino
Posts: 303
Joined: Mon Mar 04, 2013 4:53 pm

Re: dev-uart_speedup merged

Post by bpadalino » Mon Jan 06, 2014 9:02 am

Interesting. I couldn't see the LTE image, but I saw the others from drmpeg.

Can you do a version in the CLI to see what version of the library you are using? Have you updated gr-osmosdr as well?

dk5ras
Posts: 70
Joined: Fri Mar 01, 2013 3:23 am

Re: dev-uart_speedup merged

Post by dk5ras » Mon Jan 06, 2014 10:56 am

Well, I can't update the library, due to my annoying libusbx problem. I only updated firmware and the 115k fpga image. To get back a working system, I went back to the previous versions.

Why did you not see the LTE picture? Did the link fail? Then I can send it by email...

Ralph.

bpadalino
Posts: 303
Joined: Mon Mar 04, 2013 4:53 pm

Re: dev-uart_speedup merged

Post by bpadalino » Mon Jan 06, 2014 11:45 am

Link did not fail - my DNS was flaky. I saw it now. The libusbx problem is a strange one since the libusb_get_version() function has existed since 1.0.12. Are you sure it's trying to load the correct libusb? ldd on the library shows it's pulling in the one you think?

I'll take some time later to look at the conjugate issue.

dk5ras
Posts: 70
Joined: Fri Mar 01, 2013 3:23 am

Re: dev-uart_speedup merged

Post by dk5ras » Mon Jan 06, 2014 11:12 pm

I have written my results regarding the libusb problem in the troubleshooting forum. Maybe some wrong search order or so, but I do not know yet how this is configured in Linux systems. I will find out, sooner or later :)

Ralph.

drmpeg
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Joined: Fri Mar 01, 2013 3:58 am
Location: Silicon Valley
Contact:

Re: dev-uart_speedup merged

Post by drmpeg » Tue Jan 07, 2014 6:49 pm

Here's an update on the receive spectrum issue. Today, I just happened to try a new FPGA image from the Hoopycat build machine (http://hoopycat.com/bladerf_builds/). This FPGA image was built with Quartus 12.1sp1, and did not work. However, when I reloaded the new FPGA image from the Nuand site (http://nuand.com/fpga/) which is built with Quartus 13.1, the spectrum problems magically disappeared.

I don't have a clue why this worked, but it did. Ralph DK5RAS, could you give this a try?

Ron

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