Quartus II v.13 and FPGA code compilation

Discussions related to embedded firmware, driver, and user mode application software development
engidea
Posts: 13
Joined: Sat Jun 01, 2013 3:20 am

Re: Quartus II v.13 and FPGA code compilation

Post by engidea »

I wish to share what works for me, no real testing on the result, yet...

- I use quartus 13, it is much more updated on Linux and seems ok
- Bladerf is on quartus 12.1 and so all components needs to be updated, when you start Qsys and open the project thay will be updated
This will result in an "nconnected" bits in i2c master since apparently the original opencore one is not compatible with the alter one.
Click on the unconnected pins and connect them to reset and data source
Also use tools and remove dangling connections
Generate the Qsys project
- Now back on Quartus, the default bladerf goes nowhere, select another file eg: fsk_modulaor and make it a top level entity
You can now generate that and as far as I know it produces something (with tons of warnings....)
- On the Eclipse side, the best thing I have found so far is to create a new "bsb and simple project" and then copy paste the original code.
This seems for me the only way to geneate a "clean" BSP that actually works.

I understand that is is more solid to generate things using tcl, however, the GUI is needed to actually manage the project and make sense of the whole structure.
(yes, if you are advanced wizard you probably are faster using the tcl scripts, but we are not all advanced wizards, we are willing to become one :)

All in all I wish that Quartus 13 will be used in the future or alternatively, when I have a board I can share my version of the project on quartus 13
(this means I wish to contribute to the project, not that I wish to split/fork it)

Have a nice weekend you all
engidea
Posts: 13
Joined: Sat Jun 01, 2013 3:20 am

Re: Quartus II v.13 and FPGA code compilation

Post by engidea »

I finally have a board to play with, managed to have it running with osmocom_fft and to display some meaningful data for a 868 transmiter that I have.

Next step is to actually have some understanding of the FPGA development.. ;)

I am kindly asking for nuand to provide the schematics of the FPGA extension board, I bought one and the first experiment is to actually be able to interact with some simple IO.
(USB programming cable is in transit, that should make reprogramming much faster, although there should be a way to go from the altera generated file to the down-loadable one)

The next question that will benefit everybody is related to the current building mechanism.
First of all, I did try to use it with quartus II version 13.1 (yes there is an update to version 13) but no "revisions" appears in the gui after the script is run and the compilation does not complete.
(yes, I did change dash to bash link)
Second: as far as I understand the only "import" needed to create a new "project" is the one of the pin planner, all the rest is "optional" and really, pin plan is not something that can change.
(the point being that the exported csv of the pin planner is the common denominator of all projects)

The question: Is it possible, logical to have an easier to understand quartus II 13.1 project that has only the "hosted" version ?
I am willing to herald it, meaning actually get it to work and share it, if any of the leaders say it is actually doable and worthy of interest.

Any comments ?
drmpeg
Posts: 62
Joined: Fri Mar 01, 2013 3:58 am
Location: Silicon Valley
Contact:

Re: Quartus II v.13 and FPGA code compilation

Post by drmpeg »

GPIO board schematic.

http://nuand.com/gpio.pdf
engidea
Posts: 13
Joined: Sat Jun 01, 2013 3:20 am

Re: Quartus II v.13 and FPGA code compilation

Post by engidea »

Hello all

I may be wrong, but I believe that the schematics of the GPIO expansion board has the numbering of the connector flipped.
Meaning that the odd numbered pins are really the even numbers

Attached an image with some scribbling showing the number change.

Can anybody please verify and let us know ?

Thanks
engidea
Posts: 13
Joined: Sat Jun 01, 2013 3:20 am

Re: Quartus II v.13 and FPGA code compilation

Post by engidea »

Hello all

I think I am the only one willing to play with quartus II 13.1, at least for now 8-)

For any of you willing to help this is what I discovered so far.

1) the script bladerf.tcl is in theory in charge of creating the project and the revisions, as far as I can tell it does not work with quartus 13.1 on linux
meaning that the various revisions do not appear on the revision navigator in quartus, and project compilation fails in any case due to issues on upgrading nios component (i2c master)
What I am trying to do is to dig up in the config files and import the pieces that make up the hosted revision

I am however puzzled :?: on why revisions are created by a tcl script instead of being part of the project from the beginning.
Maybe the FPGA wizards :ugeek: can explain this choice ?

Congratulation for the whole project, it is surely a complicated thing !!
engidea
Posts: 13
Joined: Sat Jun 01, 2013 3:20 am

Re: Quartus II v.13 and FPGA code compilation

Post by engidea »

Good news

With some hammering I managed to be able to compile the bladeRF project using quartus 12.1sp1 using Kubuntu 12.04.
Yes, I know, it should be fairly easy, if you just accept all defaults when quartus installs

Also, I have the revisions shown on quartus gui (starting from a git clone) and since there are a few quirks I am taking notes and sharing at this address.

http://www.engidea.com/blog/bladeRF/index.html

Take care you all
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