I can not find QPSK revision

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redhad
Posts: 5
Joined: Tue Jun 30, 2015 5:55 am

I can not find QPSK revision

Post by redhad » Wed Aug 12, 2015 11:39 am

Hello,
I downloaded the file bladerf-qpsk_tx.vhd but I can not find the architecture.
I would like to Implement an OFDM modulator / demodulator, Could you help me please.
Thank you.

bpadalino
Posts: 303
Joined: Mon Mar 04, 2013 4:53 pm

Re: I can not find QPSK revision

Post by bpadalino » Wed Aug 12, 2015 7:58 pm

You don't want to use the QPSK architecture then. That is for a serial tone QPSK RRC test FPGA that I wrote to get some EVM measurements.

To do an OFDM modulator/demodulator, you'll want to make a new architecture for the top level. I'd recommend using the bladerf-hosted.vhd as a base, add a new 'revision' to the Quartus software called bladerf-ofdm, then insert the different blocks you want in the places you need them to be.

Have you written your transmitter? Or how you plan to send down the data to the FPGA? Is it going to be packetized or more like DVB-T where it's a constant stream of data?

Let me know if this doesn't make sense and I'll try to be more verbose in what you need to change.

redhad
Posts: 5
Joined: Tue Jun 30, 2015 5:55 am

Re: I can not find QPSK revision

Post by redhad » Thu Aug 13, 2015 10:16 am

Hello,

my internship subject is realization of an OFDM modulator/demodulator for bladeRF.

I studied the bladeRF architecture ( data type, communication protocol , clocks, ....) , I thought the QPSK architecture will be easier to impliment the OFDM modulator/demodulator.

The FPGA receives 32-bit data from FX3 via the interface GPIFII, the data is stored in a FIFO then the transmission of 12-bit of data to the Transmitter RF, so I think the OFDM modulator must receive 32-bit data and return the 12-bit data.

I don't know where I should set the modulator/demodulator OFDM in bladerf -hosted architecture.

Thank you.

bpadalino
Posts: 303
Joined: Mon Mar 04, 2013 4:53 pm

Re: I can not find QPSK revision

Post by bpadalino » Thu Aug 13, 2015 2:59 pm

The fifo_reader and fifo_writer are the places which interface from the sample-rate side to the FX3 GPIFII interface side.

This is where the data will be stored and where, in the current architecture, the RX and TX samples come from.

If you want you can make random data using some PRNG and feed it as your bits into your modulator. It's really just as simple as setting your carriers and feed them into an IFFT, then create your cyclic prefix. Make sure you watch the dynamic range of your signal coming out and don't clip the output. Also make sure when your two OFDM symbols get stitched together at the CP to use a little window function so the discontinuities are minimized.

Otherwise good luck - it sounds like a fun project!

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