Tx under-run reporting to application

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sergemalo
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Joined: Tue Nov 03, 2015 1:50 pm
Location: Montreal, Qc, Canada
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Tx under-run reporting to application

Post by sergemalo »

HI all,

I am porting an application to the BladeRF, and I have the next limitation:
My application absolutely needs to be aware when a Tx buffer under-run occured. In that case, the transmission must be aborted and restarted.

I found this in the libbladeRF.h:

Code: Select all

/**
 * A sample underrun has occurred. This generally only occurrs on the TX module
 * when the FPGA is starved of samples.
 *
[b] * @note libbladeRF does not report this status. It is here for future use.[/b]
 */
#define BLADERF_META_STATUS_UNDERRUN (1 << 1)
I have read the status variable after each transmission, and I really see that this underrun flag is never raised.
Q1: Will this be supported anytime soon?
Q2: Is there another way to track buffer under-runs?
I know that LED3 turns off on when a under-run occurs, so I suppose there might be a status register in the FPGA that indicates a under-run occurred. If this is the case, is there a way to read that status register from user space?

I'm using release 2015.07 and FPGA hostedx40-034.rbf

Best regards,
Serge
--------------------------------------------------------------------------------
Serge Malo
CDO & Co-founder, Skydel Solutions
www.skydelsolutions.com
Twitter: @skydelsol
jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

Re: Tx under-run reporting to application

Post by jynik »

Hi Serge,

Regarding Q1 and Q2 -- There are not currently ongoing efforts to add this support. However, it has been discussed and is largely a matter of allocating when we devs will be able to spend time on it. If this is a road-block, you may want to contact Robert and Brian via [email protected] to discuss further.

The implementation of such a feature would require a good idea as to how much information you need about the underrun.

Currently, we have a flag in the metadata reserved for this. That interface would imply that you'd simply see that an underrun occurred between bladerf_sync_tx() call number N and N-1.

Would this interface suffice, or would you need to know the timestamp at which the underrun occurred? (This added "underrun at time T" information would likely result in larger efforts to introduce this feature.)

These sort of requirements would also drive the design of how we poll the FPGA for this status. One idea was to add a pair of interrupt endpoints for RX and TX. The NIOS II in the FPGA could trigger an interrupt to the FX3, which could send an interrupt transfer to the host.

Best regards,
Jon
sergemalo
Posts: 14
Joined: Tue Nov 03, 2015 1:50 pm
Location: Montreal, Qc, Canada
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Re: Tx under-run reporting to application

Post by sergemalo »

Hi Jon,

Thanks for the quick answer!
The current interface would suffice for me: I just need to know if an underrun occurred, I don't need to know to exactly when it occurred.

Yes, that would be a road-block for our application; we are still in the process of evaluating the BladeRF.

Regards,
Serge
--------------------------------------------------------------------------------
Serge Malo
CDO & Co-founder, Skydel Solutions
www.skydelsolutions.com
Twitter: @skydelsol
jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

Re: Tx under-run reporting to application

Post by jynik »

Hi Serge,

Given that interface would work, I believe that would limit the scope of the work that needs to be done to support this.

As I mentioned above -- I would definitely encourage you to contact Brian and Robert via [email protected] to discuss your timeline and needs.

Let us know if you have any other questions or concerns in the meantime!

Best regards,
Jon
sergemalo
Posts: 14
Joined: Tue Nov 03, 2015 1:50 pm
Location: Montreal, Qc, Canada
Contact:

Re: Tx under-run reporting to application

Post by sergemalo »

Hi Jon, thanks again for your answer.

Yes, I will email Robert and Brian today.
So far, its the only road-block we have met for our application, its looking good.

Best regards,
Serge
--------------------------------------------------------------------------------
Serge Malo
CDO & Co-founder, Skydel Solutions
www.skydelsolutions.com
Twitter: @skydelsol
jquirke
Posts: 12
Joined: Sat Oct 25, 2014 12:51 am

Re: Tx under-run reporting to application

Post by jquirke »

I too would be interested in this.

I see the fifo_reader/fifo_writer expose a 64-bit counter which is wired to tx_underflow_count/rx_overflow_count respectively

However, it does not appear these counters are exposed anywhere, forgive my limited VHDL.

Would it be possible to map these counters as registers that can be read like any other register?
jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

Re: Tx under-run reporting to application

Post by jynik »

Those counters would be definitely good to expose all the way up through the bladeRF API. Feel free to create an issue for this on GitHub and mark it as an enhancement so we don't forget.
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