Sampling Rate Question

Discussions related to schematic capture, PCB layout, signal integrity, and RF development
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gaprice2354
Posts: 10
Joined: Sun Apr 20, 2014 8:22 am

Sampling Rate Question

Post by gaprice2354 »

Hi guys,

This is my first post.

I purchased a x40 a few months ago and recently purchased an x115 for a more advanced design i have in mind for the future. I am designing an RTT based ranging system using DS-CDMA signals as part of my masters thesis. After dealing with a much more expensive (70k) SDR system that was basically a paper weight on delivery im glad to be using the BladeRF for many reasons. I would love to see this project grow and maybe move towards coherent MIMO (i also have interest in direction finding). But anyways ...

My first question is this. After working with the basic capture functionality i am now looking to add my transceiver to the system and make my x115 and x40 so they can talk. I see that the Si5338 drives the FPGA tx clock as well as the tx and rx clocks for the LMS6002D. Its my understanding that the Si5338 generates a fixed 38.4MHz clock that is fed to the FX3/FPGA/LMS, is this correct? IF so then the sampling rate is fixed and i have to calculate my date rates and such from that.

I am confused though because using a script or interactive mode setting you can specify the sampling rate. Does this retune the Si5338 to produce a different clock for the FPGA and LMS, and thus a higher sampling rate?

Basically my goal is to use the highest rate spreading code (ie widest BW (14MHZ)) i can for the system so id like to have control over the sampling clock. So Fixed or Not Fixed?

Sorry to be long winded, figured id introduce myself and maybe spur some ideas/suggestions for my project if there is any interest.
bpadalino
Posts: 303
Joined: Mon Mar 04, 2013 4:53 pm

Re: Sampling Rate Question

Post by bpadalino »

The si5338 has a VCO inside of it and a fractional PLL which can derive any clock frequency you choose. Moreover, TX and RX clocks are independent and allow for different sampling. There are functions for setting the samplerate down to the Hz or using a rational sample rate (a + b/c Hz) for weird and funky sample rates like ATSC or GSM or whatever you wish to have.

Note that the si5338 creates a 2x sample clock as per the LMS documentation. This is double clocking the IQ data out - one clock for I, one clock for Q. So if you set a 10MHz sample rate, you will see 20MHz coming from the si5338.

Hope this helps! Please feel free to ask more questions. Your project sounds pretty fun!

Brian
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