FPGA Development
Posted: Fri Oct 23, 2015 3:55 pm
Hi,
As mentioned on other posts I'm working on a new design of the FPGA. I'm new with TCL and USBBlaster, two tools I have seen are used in the developing process of the bladeRF FPGA.
I have made some changes in the hosted design but for compilation I run ./build_bladerf.sh -r hosted -s 115. This takes from 10 to 15 minutes!
Does someone know a quicker way to generate the FPGA image or even compile (without all the steps) in order to check if there are any mistakes- or even create the necessary input data for simulation?
In reference to the USBBlaster, I bought one but haven't set it up yet. Is there a guide for installation and some signal and probes input files ?
In other words, could someone give me any recommendations in order to set-up a useful every-day bladeRF FPGA development workspace?
Thanks a lot!
Florencia
As mentioned on other posts I'm working on a new design of the FPGA. I'm new with TCL and USBBlaster, two tools I have seen are used in the developing process of the bladeRF FPGA.
I have made some changes in the hosted design but for compilation I run ./build_bladerf.sh -r hosted -s 115. This takes from 10 to 15 minutes!
Does someone know a quicker way to generate the FPGA image or even compile (without all the steps) in order to check if there are any mistakes- or even create the necessary input data for simulation?
In reference to the USBBlaster, I bought one but haven't set it up yet. Is there a guide for installation and some signal and probes input files ?
In other words, could someone give me any recommendations in order to set-up a useful every-day bladeRF FPGA development workspace?
Thanks a lot!
Florencia