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FPGA Development

Posted: Fri Oct 23, 2015 3:55 pm
by flo003
Hi,
As mentioned on other posts I'm working on a new design of the FPGA. I'm new with TCL and USBBlaster, two tools I have seen are used in the developing process of the bladeRF FPGA.

I have made some changes in the hosted design but for compilation I run ./build_bladerf.sh -r hosted -s 115. This takes from 10 to 15 minutes!
Does someone know a quicker way to generate the FPGA image or even compile (without all the steps) in order to check if there are any mistakes- or even create the necessary input data for simulation?

In reference to the USBBlaster, I bought one but haven't set it up yet. Is there a guide for installation and some signal and probes input files ?

In other words, could someone give me any recommendations in order to set-up a useful every-day bladeRF FPGA development workspace?

Thanks a lot!
Florencia

Re: FPGA Development

Posted: Sat Oct 24, 2015 2:17 pm
by jynik
Hi there Florencia,
flo003 wrote: I have made some changes in the hosted design but for compilation I run ./build_bladerf.sh -r hosted -s 115. This takes from 10 to 15 minutes! Does someone know a quicker way to generate the FPGA image or even compile (without all the steps) in order to check if there are any mistakes- or even create the necessary input data for simulation?
This script is intended to run the entire build process, hence it taking a while. (Although, I've seen larger designs take hours to synthesize!)

After running that script to generate and build everything once, you could open up the bladerf.qpf project file, found in the resulting work/ directory, from within Quartus II. From within Quartus II, I think you'll find that you can do such smaller tasks (e.g. syntax checks of files) much quicker.

The only caveat to this is if you make changes to the Qsys system -- then you'll have to regenerate those items from Qsys.
flo003 wrote:In reference to the USBBlaster, I bought one but haven't set it up yet. Is there a guide for installation and some signal and probes input files ?
What you'll want to look up is SignalTap II. If you search around online, you'll find plenty of resources, like guides and videos.

Note that to use SignalTap II in the free (Web Edition) version of Quartus II, you'll have enable the "TalkBack" feature.


Cheers,
Jon

Re: FPGA Development

Posted: Thu Oct 29, 2015 5:40 pm
by math
It's worth noting, that if you enable the Talkback feature, Quartus will enable parallel compilation. That speeds up some of the process a bit further.

Re: FPGA Development

Posted: Fri Feb 05, 2016 3:34 pm
by josebeta77
Are the FPGA design files available for modification and/or further development? Are they part of the package when purchasing the bladeRF?

Re: FPGA Development

Posted: Tue Feb 09, 2016 8:45 am
by jynik
All source code (host code, FX3 firmware, FPGA HDL) is open source and available at https://github.com/Nuand/bladeRF.