Official bladeRF forum

Hello,
Has anyone successfully managed to send PDUs to and from the host computer to a BladeRF x40/x115? I have a few questions as I cannot get the FPGA to act on those packets. i.e. set LED2 high if the second byte is 0xFF for instance.

I know it is supported, and the libbladeRF does not return an error, but I must do something wrong on the FPGA side.

Any advice?

I would recommend checking the FPGA code to ensure that it is correctly configured to interpret the incoming packets and respond accordingly. You may want to verify that the FPGA is properly configured to check the second byte of the packet and set LED2 high if it matches the desired value of 0xFF. Double-checking the logic and debugging the FPGA code could help identify any potential issues.

Hey! I haven't worked with BladeRF specifically, but I've definitely been down the rabbit hole of getting hardware to respond to packets. Frustrating stuff! Have you double-checked your byte alignment in the FPGA code? Sometimes a simple off-by-one error can cause headaches. It reminds me of playing Eggy Car - one wrong tap and everything goes tumbling down! Maybe try simplifying your FPGA logic to just the LED control, see if that works, then slowly add complexity back in. Good luck debugging!

It sounds like you might be running into issues with the packet handling logic in your VHDL/Verilog code. Debugging FPGA communication can be incredibly frustrating—sometimes I just want to play kick the buddy to blow off some steam when my code won't compile! Have you double-checked the NIOS II soft-core interaction if you're using it? It might be swallowing the packets before your custom logic sees them.

I've been tinkering with BladeRF stuff too, though admittedly not at the PDU level you're diving into. FPGA stuff always feels like a black box to me! Setting an LED based on packet content sounds like a cool project. Are you sure the data path is correctly mapped from the packet buffer to the LED control logic in your FPGA design? Speaking of things behaving unexpectedly, the other day I was trying out this game called Crazy Cattle 3D and those virtual cows were defying gravity in ways I couldn't explain! It made me think, maybe there's a simple logic error somewhere causing the chaos in my code, and perhaps the same might apply to your FPGA config? I'd double-check those mappings and signal assignments. Good luck!