Official bladeRF forum

Hi,
Im using bladerf with different configurations and I would like you to ask you, how can i get the direct access to FPGA from ubs if its possible or not?, because i want to transmit and receive signals with my own parameters .
what should i change in bladerf driver or how to get this access ?

I mean that the whole scheme looks like on the picture[img ] and im curious about the direct access to FPGA and skip cypress usb controller.it is possible to send the direct signals to FPGA via USB connection?

Dear Jon,
what we are trying to do is rather straightforward:
1. get a way to send instructions directly to our custom-built FPGA firmware, bypassing libbladerf altogether. It does not mater if FX3 is involved or not.
2. Make sure that FPGA can run its own MAC protocol (i.e. synthesize its own samples)
3. Make a linux kernel driver to use the new mac as a USB network interface.
If you can, point us in the right direction.
Thank You!

Hi Jon,
I would like to share patch with community,because when you install SDK for FX3 you should do some manipulations/i think this patch help someone.and also I would like to ask questions about how to upgrade or upload new firmware for FX3.because we tried to do it in RAM and it doesnt work/do you have some tutorials or videos?

https://dl.dropboxusercontent.com/u/560 ... d%29.patch its a link for patch

Dear Jon,
could you please tell me how to get the stdout (or any other text output) from FX3 if using method 2? I have also edited the patch and added the description in the original post.

Hi Jon,
Could you please tell me how to upload our new custom FPGA firmware and where i can find default FPGA firmware ?

Hello Jon,
I have another question for you.if its possible to upload firmware.rbf to Altera using Quartus?

Hi Jon,
Thanks,yes now i will use proper nomenclature.
I have altera usb blaster,this is also ok for load bitstream ?and one more question about jampers,I should change something in case with altera bitstream,because in case with FX3 we need to do it

And one more question,how to convert hostedx115-latest.rbf into hostedx115-latest.sof or other format which compatible with quartus for upload bitstream,or where i can find .sof or other programming format files

thanks Jon)I found it)

Hi Jon,
I faced with problem,how to add signaltap in FPGA bitstream,i follow by instructions which describe ho to build bitstream,but i also want to add signaltap,i typed this command "quartus_sh -t ../build.tcl -rev hosted -size 115 -stp ../signaltap/debug_rx.stp" but its not working.Could you please clarify in details how to add signaltap in my bitstream ?because is not clear how to work with TalkBack
i put link with my terminal code
https://dl.dropboxusercontent.com/u/560 ... .48.49.png

Hi Konstantin,

Looks like the script is looking for QIP files at /fpga/platforms/bladerf/bladerf.qip. Is this a valid path? It doesn't seem like it would be. This QIP file adds the necessary top-level VHDL files and settings to the Quartus project, without it, it wont work.

If you're doing something custom, you may have to edit the paths in the various build scripts to point to a valid bladerf.qip location. The bladerf.qip also calls other .qip files, so you'll have to make sure those paths are valid as well.

Let us know how this goes.

Hi,
I solved problem with building project.but i have one question about -stp ../signaltap/debug_rx.stp because debug_rx.stp are not exist in signaltap folder after building is it ok?or i should choose files which exist in signaltap folder? After building firmware Signaltap should displayed in the summary or not?Im trying to use signaltap analyzer and add rx.signals.stp.signaltap shows that instance not found
As I understand i should follow the next steps for add signal tap in my firmware
1 go to quartus folder cd /home/kostya/bladeRF/hdl/quartus
2 create a project quartus_sh -t /home/kostya/bladeRF/hdl/quartus/bladerf.tcl -rev hosted -size 115
3.quartus_sh -t /home/kostya/bladeRF/hdl/quartus/build.tcl -rev hosted -size 115 -force TalkBack-stp /home/kostya/bladeRF/hdl/quartus/signaltap/debug_rx.stp
4. start building firmware ./build_bladerf.sh -r hosted -s 115 -a /home/kostya/bladeRF/hdl/quartus/signaltap/debug_rx.stp
Could you please give me some hints if i do something wrong
Quartus 15.0 ubuntu 14.04

The .stp file can reside anywhere on your machine, you'll just need to provide a valid path to the .stp file when running the build script.

A few points to remember when creating a SignalTap instance:
- Use the Node Finder to select your clock and data signals.
- In the Node Finder window, there is a "Filter" drop-down, make sure this is set to either "SignalTap II: Pre-synthesis" or "SignalTap II: Post-fitting" as this will ensure you only select valid nets.
- Remember to set a reasonable sample depth. "Reasonable" depends on what you're trying to look at. Don't make it too large or you risk running out of block memory in the device.

I'm a little confused about your build process. Why are you doing steps 2 and 3 (quartus_sh)? You should just be able to run build_bladerf.sh with appropriate options, and it will handle all the calls to quartus_sh, ip-generate, etc. for you.

In the past, I've sometimes had issues with SignalTap not being enabled even though it should be. I've only seen this manifest in a scripted build, and I'm not sure if it has been fixed. At any rate, to get around this glitch (if you run into it), I've opened the Quartus project in the GUI, verified SignalTap is enabled and using a valid .stp file, then re-run Analysis & Synthesis, Fitter, and Generate Programming File manually using the GUI.

Hi,
Thanks for reply)Im solved my problem when im using GUI,i think a scripted build is not working properly.Better to use GUI