bladeRF micro phase coherency

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bladeRF micro phase coherency

Post by kazam » Wed Oct 03, 2018 7:03 am

Is it possible to set up two bladeRF micros such that they are phase coherent? According to AD it should be possible:Analog Devices

I'm interested in 4xRX MI applications primarily so that's why I ask.


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Re: bladeRF micro phase coherency

Post by rtucker » Tue Oct 30, 2018 7:03 pm


Maybe! We did plan for this during design, but as far as I know, it has not yet been attempted.

From the looks of things, the FMCOMMS5 uses an ADF5355 to generate LO signals to be fed into RX_EXT_LO / TX_EXT_LO pins on the '9361s. We expose these traces on U74 (the expansion connector) on pins 3 (RX_EXT_LO) and 4 (TX_EXT_LO), so a similar sort of arrangement could be done. We also connect the SYNC_IN to the FPGA.

The FMCOMMS5 wiki section also includes a page on multi-chip synchronization, which details use of the SYNC_IN to synchronize the sampling clocks, as well as a method of using the RX*_C inputs to measure the phase error vs the other chip's TX. (We have unpopulated UFL pads for RX1_C and RX2_C, which are independent of the rest of the RF section). With a common 38.4 MHz clock connected to the CLKINs on both boards and some phase correction logic in the FPGA, it has the potential to work.

I hope this is helpful! Thanks for your question. :)
Rey Tucker (she/her)
Systems Engineer, Nuand LLC
Rochester, NY, USA


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Re: bladeRF micro phase coherency

Post by maddog » Mon Feb 25, 2019 3:44 pm

Hi Rey,

I am trying to implement the same using two bladeRF xA9's in 4x4MIMO.

As far as my understanding goes the multichip sync for AD9361 has two methods one is to measure the phase difference in internal LO's and correct it in FPGA and the other is to use an external LO. I will try to use the extenal LO option and could you elaborate on what changes might need to be done in the FPGA?

For the SYNC_IN can I use the FPGA trigger functionality to control the SYNC_IN pin on two different devices at same time?


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