bladeRF FPGA images


The latest FPGA bitstreams are referenced via: The current ADS-B decoder FPGA bitstreams are available via:
2016-05-25- v0.6.0
   Changeset: 9f72b2e98cb9b86aaaa3c7613e92cc08e30221ca
   Notes:
     * Added TRX synchronization trigger functionality via J71-4. (Requires libbladeRF v1.7.0 or later.)

    hostedx40.rbf
        md5sum:         29a65d08e3a98f16dd26dee5bc9200a1
        sha256sum:      4d3a2f8adb459b67391aa0a6225461df2fbb8e3fb2ae7589b9dd22c8c1b0041b
        Fitter Summary: hostedx40.fit.summary

    hostedx115.rbf
        md5sum:         326dc7f8e87b6f38716470b43de8b4e2
        sha256sum:      57d57f11e85c9727f699ef35a3956e9e4006665d5891fd599d1fa765894a5323
        Fitter Summary: hostedx115.fit.summary

2015-12-30 - v0.5.0
   Changeset: 9f72b2e98cb9b86aaaa3c7613e92cc08e30221ca
   Notes:
     * Added support for VCTCXO taming via 1PPS or 10 MHz signal on J71 pin 1 (Must be 1.8V).
     * Added FIFO between TX and RX for digital loopback mode for clock synchronization and
       additional sample buffering.

    hostedx40.rbf
        md5sum:         af8ea27b4f545113db3d9b6d986f6525
        sha256sum:      179c8a09486415030431b05f537ae78b6388cbbf9e2c2e007aec1a0925912f3d
        Fitter Summary: hostedx40.fit.summary

    hostedx115.rbf
        md5sum:         8af6607afdcf9b00ddae8fbd2cf2eafa
        sha256sum:      2df44642c5d27a9934a61649e8795988ceb1a96c38cc2ee5849206cf26d43ea4
        Fitter Summary: hostedx115.fit.summary

2015-09-01 - v0.4.1
   Changeset: 859377326bd5cbf0f4f821aade1438cc57e1b7d3
   Notes:
     * Fixed a defect in masked writes to XB GPIO and XB GPIO direction registers
    
   hostedx40.rbf
       md5sum:    4bdfc5543d7167d7f59fcf7d38b28945
       sha256sum: 89b32b6c75d610ac615f8507354f97c086a423e695c159b43f30538d1f7ae44f

   hostedx115.rbf
       md5sum:    ae639096fa40478c965e765052dd530c
       sha256sum: f6af75573a9c93aee54dfeeaad136beac23a78df370a189175c1d9dd22db3484

2015-08-27 - v0.4.0
   Changeset: 859377326bd5cbf0f4f821aade1438cc57e1b7d3
   Notes:
     * LMS6002D PLL registers are written atomically to allow for slightly cleaner retuning 
    
   hostedx40.rbf
       md5sum:    6be518d7b746d7b591632c2f84d2fbe1
       sha256sum: 8ff55aee056004dcc14d2cd12ab3828dc5b090af23c10a8ee24746f90a76ca0d

   hostedx115.rbf
       md5sum:    41d180d19ee326baef57946f55140b4c
       sha256sum: edebc78e6123c93d09ccce57d8d22f72825534253e640a3bca8adbef9746f8f2

2015-08-25 - v0.3.5
   Changeset: eea547def0634d174fa834c0aa0177dd2000fdeb
   Notes:
     * Resolved issues in "FPGA tuning mode" caused by VTUNE being sampled prior to settling.
    
   hostedx40.rbf
       md5sum:    d2e5e7d4aad51dcea352a53e0c41d1bc
       sha256sum: 1e53063130455124948d8938a82a258fd9265dadbad09ca020e355784db31c51

   hostedx115.rbf
       md5sum:    1b725095979e34cd9b7f09e28d9cd7bb
       sha256sum: 953179547e71eb4acee098a01049dc54003ff8c7b3bb4571965ce66d9b6a1f3b

2015-07-25 - v0.3.4
   Changeset: 68c617b70f8b13a05b6eeb9e54e22f9e52052166
   Notes:
     * Fixed a bug where multiple TX NOW bursts would accumulate samples
       in the FIFOs and causing a slip between metadata and sample FIFOs.
    
   hostedx40.rbf
       md5sum:    03726935ab8e755f1ab2ead2e6032bb9
       sha256sum: 517de44d7ad8cdc0e88b0d3d8945a580a1c9a25fb90ec9f0b1fd34fe30a2e8ff

   hostedx115.rbf
       md5sum:    aedc67cff1bf0b7ec237a3c122dfeccd
       sha256sum: fbbe05efcac213cc65aeb9b1235b2341595be08b11b0d3ea9ff0071ac60ad19c

2015-06-30 - v0.3.3
   Changeset: 5517732a24aaf7dd4e1e74ed4d9039fdc0784fed
   Notes:
     * Fixed timing constraints on SPI controller
    
   hostedx40.rbf
       md5sum:    f5749c5f211661a3090b0b556eb29cf1
       sha256sum: 525dc303a87a46a7cee3d28480eda0ed084c87e1f471b17fd5d0182517e7d402

   hostedx115.rbf
       md5sum:    0607f024beb4e3ccda5d672b7f75f283
       sha256sum: 705d475d534f55deb6e804cc0a203b114775c82fef14931815c3dcf61ab02970

2015-06-23 - v0.3.2
   Changeset: 914c8c59f5d76f3d14d9caf6d58344ec04a39637
   Notes:
     * Fixed bug in readback of current VCTCXO trim DAC value
    
   hostedx40.rbf
       md5sum:    fd6b86a7a0aa9345440c8e5d091005d1
       sha256sum: 4373c4d4ba54b01483a107fc754c3faf182cc992005095928c54fc732ca5ef2d

   hostedx115.rbf
       md5sum:    cf8526a816cdb593fa1f01d4cc5ba5bd
       sha256sum: 49bfdc5356275a4c4f2925a48e73473cd99b42f80b5599fe2e01480403140b39

2015-06-18 - v0.3.1
   Changeset: a9a4569f2dac32be7c6a85a80f2273254909fc17
   Notes:
     * "Quick retune" and scheduled tuning support
     * The time tamers have been separated and now have programmable interrupts
     * Added faster, custom SPI block for LMS6 communication
     * Redesigned control/configuration program running on NIOS II for better readability and extensibility
    
   hostedx40.rbf
       md5sum:    028b490414d4f0edae7ad73154cb6780
       sha256sum: 6242d28b858e43d536898d77abfcb9ecfcc6844d45ea2ac3765f87fa1790dd27

   hostedx115.rbf
       md5sum:    d7e9093fb2db71e6acaf45029f5c91e6
       sha256sum: 13ca23339c848b38118a0daf3234cdf708f1d8aaaca718f0c74cba2fb7288a31

2014-11-12 - v0.1.2
   Changeset: ebc346b091ff6f49bc23fdee12881dca233aae92
   Notes:
     * Fixed issues with TX_NOW and dropped messages.
       - This addresses issues #334 and #335.
    
   hostedx40.rbf
       md5sum:    ff681baa275d3f01af3d864e737a23ae
       sha256sum: 85f2e237829476f6f15851a25ce96084dfc695820c37cd6751efee4c4806999a

   hostedx115.rbf
       md5sum:    899da656cfb73789febe515b9d82f67e
       sha256sum: 3dea872433a4dc3410c3aa667dc18caa8c2fda0a616d325f95d6f2ef02221f90

2014-10-22 - v0.1.1
   Changeset: 9c0bbfe61adefcc76a8f5f93514e700ae8042ce9
   Notes:
     * Updated LMS SPI component to address intermittent communication errors
       - This addresses issue #269
    
   hostedx40.rbf
       md5sum:    bf7016f5cbe657df8d25ce12bc48c3aa
       sha256sum: 48852d9d0a64f03331e0c3c1adf6dd56ee8ef77bf6ae93401bf845a1117714a8

   hostedx115.rbf
       md5sum:    29676f895788c23339b4fee85684b623
       sha256sum: 112b315efaa4aef4bdb15285fb637ff1c93aa24cc3aa98d86ebb4e02d2352aa6

2014-10-21 - v0.1.0
   Changeset: 58fc84105cf1f543f57edce483cddbedbbcf38d7
   Notes:
     * Backwards-compatible features introduced:
        - Added option to divide sample counter by 2.
        - Added "TX_NOW"
     * Fixes:
        - Addessed data/timestamp slipping
        - Fixed readback of current timestamp value
        - Send zero samples TX module to mitigate effect of default output power
          from the LMS after intialization.

   hostedx40.rbf
       md5sum:    14eb9e1f2f0aefd5f17825f406da59a3
       sha256sum: 5d0d77f71babb0c35cb22f684849b3543f6509b2a444475ed8bd94399a19d415

   hostedx115.rbf
       md5sum:    c70193fd68f60fa1e53fe20aa1f8cbc4
       sha256sum: 91facd22cfbae1e546403a98dd087764959d78804292ea89379a870191191115

2014-07-20 - v0.0.6
   Changeset: c3bd0f217f6c831486032a176cb3a2e41e271034
   Notes:
      Fixed FPGA gain/phase corrections being written and readback.

   hostedx40.rbf
       md5sum:    85b91b0caeb64750e8d0ca8dd3358992
       sha256sum: 206c7629d3191d4bb29e2826730c89a160cc565a7e54a7c2b2c2db05549e72cb

   hostedx115.rbf
       md5sum:    eb91ecda1d1203750f0f2b9859c9c20f
       sha256sum: 1c145aee9555a84ecc065fe50e15b56835be2c3691ae747cb74e0c24a8fd1e4b

2014-06-21 - v0.0.5
   Changeset: 15340770ca59d30b82109ad8670aa0fe027ca9fe
   Notes:
      Added expansion board support for XB-200.

   hostedx40.rbf
        md5sum:    a474050c832cbe528fb8635b36c36a34
        sha256sum: dc95bd355532c8b4541136f5d1fb8ab6d44357bbb37ffdd3e26cc23b5c6f5803

   hostedx115.rbf
        md5sum:    d3ca5dc09115daf0bab731744b081165
        sha256sum: 19cfd0aeb652acff797e520924cf96ed5b0a4350f8858b54b8bee81ab067995c

2014-02-01 - v0.0.3
   Changeset: bc88a82090fc90397b34a71a446eae2a3e259f04
   Notes:
      Fixed constraints and added 32-bit counter mode. Requires firmware v1.6.1+

   hostedx40.rbf
        md5sum:    6cedceae9048f1dfbec3dbd95239e869
        sha256sum: 4ffe380de7afebd9fc20b3baf13d90c42562439acb69abf95c76fd1ae738a0ee

   hostedx115.rbf
        md5sum:    58e9fab16f2e9bcbb059116dbc44f39e
        sha256sum: 21ae56fde8d4022acc0ee4d0052f804fd0bc6f32e210d4e394907e9fcfa15594

2014-01-14 - v0.0.2
   Changeset: a93eb3e63c545e8b24977cfc1d2595b8b841fc2
   Notes:
      Fixed constraints, a SPI/UART signal contention issue, and phase range for IQ correction. Requires firmware v1.6.1+

   hostedx40.rbf
        md5sum:    addf3faaafb095e2be226db95ecf09f8
        sha256sum: 47bcb8d1a61c5966037127e194a52ad056d6369b3321d6696b4d9e0d9ed81c41

   hostedx115.rbf
        md5sum:    b064e44d877eae863b64fc87b22d04ac
        sha256sum: a67298ef00488ae9a86e0c3e1178d6f449f9456ae67e37dfd29185c3d3c162c0

2013-12-28 - v0.0.1
   Changeset: 89d57ff8bfe3a7772d6bf7ec08baabf6f2e2435e
   Notes:
      Introduces faster UART bridge, IQ correction, FPGA version numbering, and addtional fixes. Requires firmware v1.6.0+

   hostedx40.rbf
        md5sum:    e0afb18f71cd78a86df5d9a8a75bb94c
        sha256sum: 9ac94da0a172363274a09fc8606e707bd9f0d1f159ef6b99934f19d4bbe499a3

   hostedx115.rbf
        md5sum:    4daae6c1ae8993e67ba51291ba3d282d
        sha256sum: eb3037991e27e9ff09d4cd0d3e3e1183ae70ab139c61121ebaa6d80290180caa