Reference: http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4002.pdf
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API_EXPORT int CALL_CONV | bladerf_get_pll_lock_state (struct bladerf *dev, bool *locked) |
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API_EXPORT int CALL_CONV | bladerf_get_pll_enable (struct bladerf *dev, bool *enabled) |
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API_EXPORT int CALL_CONV | bladerf_set_pll_enable (struct bladerf *dev, bool enable) |
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API_EXPORT int CALL_CONV | bladerf_get_pll_refclk_range (struct bladerf *dev, const struct bladerf_range **range) |
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API_EXPORT int CALL_CONV | bladerf_get_pll_refclk (struct bladerf *dev, uint64_t *frequency) |
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API_EXPORT int CALL_CONV | bladerf_set_pll_refclk (struct bladerf *dev, uint64_t frequency) |
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API_EXPORT int CALL_CONV | bladerf_get_pll_register (struct bladerf *dev, uint8_t address, uint32_t *val) |
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API_EXPORT int CALL_CONV | bladerf_set_pll_register (struct bladerf *dev, uint8_t address, uint32_t val) |
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◆ bladerf_get_pll_enable()
Fetch the state of the Phase Detector/Frequency Synthesizer
- Parameters
-
| dev | Device handle |
[out] | enabled | True if enabled, False otherwise |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_get_pll_lock_state()
Fetch the lock state of the Phase Detector/Frequency Synthesizer
- Parameters
-
| dev | Device handle |
[out] | locked | True if locked, False otherwise |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_get_pll_refclk()
Get the currently-configured frequency for the reference clock input.
- Parameters
-
| dev | Device handle |
[out] | frequency | Reference clock frequency |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_get_pll_refclk_range()
Get the valid range of frequencies for the reference clock input
- Parameters
-
| dev | Device handle |
[out] | range | Reference clock frequency range |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_get_pll_register()
API_EXPORT int CALL_CONV bladerf_get_pll_register |
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struct bladerf * |
dev, |
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uint8_t |
address, |
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uint32_t * |
val |
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) |
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Read value from Phase Detector/Frequency Synthesizer
The address
is interpreted as the control bits (DB1 and DB0) used to write to a specific latch.
- Parameters
-
| dev | Device handle |
[in] | address | Latch address |
[out] | val | Value to read from |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_set_pll_enable()
Enable the Phase Detector/Frequency Synthesizer
Enabling this disables the VCTCXO trimmer DAC, and vice versa.
- Parameters
-
| dev | Device handle |
[in] | enable | True to enable, False otherwise |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_set_pll_refclk()
Set the expected frequency for the reference clock input.
- Parameters
-
| dev | Device handle |
[in] | frequency | Reference clock frequency |
- Returns
- 0 on success, value from Error codes list on failure
◆ bladerf_set_pll_register()
API_EXPORT int CALL_CONV bladerf_set_pll_register |
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struct bladerf * |
dev, |
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uint8_t |
address, |
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uint32_t |
val |
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) |
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Write value to Phase Detector/Frequency Synthesizer
The address
is interpreted as the control bits (DB1 and DB0) used to write to a specific latch. These bits are masked out in val
- Parameters
-
| dev | Device handle |
[in] | address | Latch address |
[in] | val | Value to write to |
- Returns
- 0 on success, value from Error codes list on failure